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Systematic Design of Loop Circuit Topologies Using C/IDS Me..:

Atkinson, Jacob ; Bailey, Anthony ; Tajalli, Armin
IEEE Transactions on Very Large Scale Integration (VLSI) Systems.  30 (2022)  10 - p. 1538-1542 , 2022
Link: https://doi.org/10.1109/tvlsi.2022.3181969