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1 Ergebnisse
1
A Low-Power In-Memory Multiplication and Accumulation Array..:
Xiao, Rui
;
Zhang, Yewei
;
Wang, Bo
...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 31 (2023) 11 - p. 1700-1712 , 2023
Link:
https://doi.org/10.1109/tvlsi.2023.3306376
RT Journal T1
A Low-Power In-Memory Multiplication and Accumulation Array With Modified Radix-4 Input and Canonical Signed Digit Weights
UL https://suche.suub.uni-bremen.de/peid=cr-10.1109_tvlsi.2023.3306376&Exemplar=1&LAN=DE A1 Xiao, Rui A1 Zhang, Yewei A1 Wang, Bo A1 Xu, Yanfeng A1 Fan, Jicong A1 Shen, Haibin A1 Huang, Kejie PB Institute of Electrical and Electronics Engineers (IEEE) YR 2023 SN 1063-8210 SN 1557-9999 JF IEEE Transactions on Very Large Scale Integration (VLSI) Systems VO 31 IS 11 SP 1700 OP 1712 LK http://dx.doi.org/https://doi.org/10.1109/tvlsi.2023.3306376 DO https://doi.org/10.1109/tvlsi.2023.3306376 SF ELIB - SuUB Bremen
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