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1 Ergebnisse
1
An Optimized Low-Power VLSI Architecture for ECG/VCG Data C..:
Janveja, Meenali
;
Sharma, Ashwani Kumar
;
Bhardwaj, Abhyuday
..
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 31 (2023) 12 - p. 2008-2015 , 2023
Link:
https://doi.org/10.1109/tvlsi.2023.3314611
RT Journal T1
An Optimized Low-Power VLSI Architecture for ECG/VCG Data Compression for IoHT Wearable Device Application
UL https://suche.suub.uni-bremen.de/peid=cr-10.1109_tvlsi.2023.3314611&Exemplar=1&LAN=DE A1 Janveja, Meenali A1 Sharma, Ashwani Kumar A1 Bhardwaj, Abhyuday A1 Pidanic, Jan A1 Trivedi, Gaurav PB Institute of Electrical and Electronics Engineers (IEEE) YR 2023 SN 1063-8210 SN 1557-9999 JF IEEE Transactions on Very Large Scale Integration (VLSI) Systems VO 31 IS 12 SP 2008 OP 2015 LK http://dx.doi.org/https://doi.org/10.1109/tvlsi.2023.3314611 DO https://doi.org/10.1109/tvlsi.2023.3314611 SF ELIB - SuUB Bremen
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