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1 Ergebnisse
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HETA: A Heterogeneous Temporal CGRA Modeling and Design Spa..:
Dai, Yuan
;
Li, Jingyuan
;
Zhu, Qilong
...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 32 (2024) 3 - p. 505-518 , 2024
Link:
https://doi.org/10.1109/tvlsi.2023.3344536
RT Journal T1 <Title>HETA: A Heterogeneous Temporal CGRA Modeling and Design Space Exploration via Bayesian Optimization</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1109_tvlsi.2023.3344536&Exemplar=1&LAN=DE A1 Dai, Yuan A1 Li, Jingyuan A1 Zhu, Qilong A1 Qiu, Yunhui A1 Hu, Yihan A1 Yin, Wenbo A1 Wang, Lingli PB Institute of Electrical and Electronics Engineers (IEEE) YR 2024 SN 1063-8210 SN 1557-9999 JF IEEE Transactions on Very Large Scale Integration (VLSI) Systems VO 32 IS 3 SP 505 OP 518 LK http://dx.doi.org/https://doi.org/10.1109/tvlsi.2023.3344536 DO https://doi.org/10.1109/tvlsi.2023.3344536 SF ELIB - SuUB Bremen
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