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ALT: Area-Efficient and Low-Latency FPGA Design for Torus F..:

Hu, Xiao ; Li, Zhihao ; Wang, Zhongfeng.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems.  32 (2024)  4 - p. 645-657 , 2024
Link: https://doi.org/10.1109/tvlsi.2024.3353374