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1 Ergebnisse
1
Dual-Rail Precharge Logic-Based Side-Channel Countermeasure..:
Wu, Le
;
Wu, Liji
;
Zhang, Xiangmin
.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. , 2024
Link:
https://doi.org/10.1109/tvlsi.2024.3387986
RT Journal T1 <Title>Dual-Rail Precharge Logic-Based Side-Channel Countermeasure for DNN Systolic Array</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1109_tvlsi.2024.3387986&Exemplar=1&LAN=DE A1 Wu, Le A1 Wu, Liji A1 Zhang, Xiangmin A1 Chinbat, Munkhbaatar PB Institute of Electrical and Electronics Engineers (IEEE) YR 2024 SN 1063-8210 SN 1557-9999 JF IEEE Transactions on Very Large Scale Integration (VLSI) Systems SP 1 OP 4 LK http://dx.doi.org/https://doi.org/10.1109/tvlsi.2024.3387986 DO https://doi.org/10.1109/tvlsi.2024.3387986 SF ELIB - SuUB Bremen
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