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1 Ergebnisse
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Reducing memory access latency with asymmetric DRAM bank or..:
Son, Young Hoon
;
Seongil, O.
;
Ro, Yuhwan
..
ACM SIGARCH Computer Architecture News. 41 (2013) 3 - p. 380-391 , 2013
Link:
https://doi.org/10.1145/2508148.2485955
RT Journal T1 <Title>Reducing memory access latency with asymmetric DRAM bank organizations</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1145_2508148.2485955&Exemplar=1&LAN=DE A1 Son, Young Hoon A1 Seongil, O. A1 Ro, Yuhwan A1 Lee, Jae W. A1 Ahn, Jung Ho PB Association for Computing Machinery (ACM) YR 2013 SN 0163-5964 JF ACM SIGARCH Computer Architecture News VO 41 IS 3 SP 380 OP 391 LK http://dx.doi.org/https://doi.org/10.1145/2508148.2485955 DO https://doi.org/10.1145/2508148.2485955 SF ELIB - SuUB Bremen
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