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Revisiting the Complexity of Hardware Cache Coherence and S..:
Komuravelli, Rakesh
;
Adve, Sarita V.
;
Chou, Ching-Tsun
ACM Transactions on Architecture and Code Optimization. 11 (2014) 4 - p. 1-22 , 2014
Link:
https://doi.org/10.1145/2663345
RT Journal T1 <Title>Revisiting the Complexity of Hardware Cache Coherence and Some Implications</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1145_2663345&Exemplar=1&LAN=DE A1 Komuravelli, Rakesh A1 Adve, Sarita V. A1 Chou, Ching-Tsun PB Association for Computing Machinery (ACM) YR 2014 SN 1544-3566 SN 1544-3973 JF ACM Transactions on Architecture and Code Optimization VO 11 IS 4 SP 1 OP 22 LK http://dx.doi.org/https://doi.org/10.1145/2663345 DO https://doi.org/10.1145/2663345 SF ELIB - SuUB Bremen
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