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An identification of the tolerable time-interleaved analog-..:
Dung Huynh, Vo Trung
;
Mai, Linh
;
Do, Hung Ngoc
..
International Journal of Electrical and Computer Engineering (IJECE). 12 (2022) 2 - p. 1667 , 2022
Link:
https://doi.org/10.11591/ijece.v12i2.pp1667-1674
RT Journal T1 <Title>An identification of the tolerable time-interleaved analog-to-digital converter timing mismatch level in high-speed orthogonal frequency division multiplexing systems</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.11591_ijece.v12i2.pp1667-1674&Exemplar=1&LAN=DE A1 Dung Huynh, Vo Trung A1 Mai, Linh A1 Do, Hung Ngoc A1 Truong Nguyen, Minh Ngoc A1 Pham, Trung Kien PB Institute of Advanced Engineering and Science YR 2022 SN 2722-2578 SN 2088-8708 JF International Journal of Electrical and Computer Engineering (IJECE) VO 12 IS 2 SP 1667 LK http://dx.doi.org/https://doi.org/10.11591/ijece.v12i2.pp1667-1674 DO https://doi.org/10.11591/ijece.v12i2.pp1667-1674 SF ELIB - SuUB Bremen
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