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1 Ergebnisse
1
FPGA based highly efficient MISTY1 architecture:
Yasir
;
Wu, Ning
;
Chen, Xin
..
IEICE Electronics Express. 14 (2017) 18 - p. 20170841-20170841 , 2017
Link:
https://doi.org/10.1587/elex.14.20170841
RT Journal T1 <Title>FPGA based highly efficient MISTY1 architecture</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1587_elex.14.20170841&Exemplar=1&LAN=DE A1 Yasir A1 Wu, Ning A1 Chen, Xin A1 Yahya, Muhammad Rehan A1 Zhang, Xiaoqiang PB Institute of Electronics, Information and Communications Engineers (IEICE) YR 2017 SN 1349-2543 JF IEICE Electronics Express VO 14 IS 18 SP 20170841 OP 20170841 LK http://dx.doi.org/https://doi.org/10.1587/elex.14.20170841 DO https://doi.org/10.1587/elex.14.20170841 SF ELIB - SuUB Bremen
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