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FPGA Implementation of a Stream-Based Real-Time Hardware Li..:
MANABE, Taito
;
KATAYAMA, Taichi
;
SHIBATA, Yuichiro
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E105.A (2022) 3 - p. 468-477 , 2022
Link:
https://doi.org/10.1587/transfun.2021vlp0009
RT Journal T1 <Title>FPGA Implementation of a Stream-Based Real-Time Hardware Line Segment Detector</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1587_transfun.2021vlp0009&Exemplar=1&LAN=DE A1 MANABE, Taito A1 KATAYAMA, Taichi A1 SHIBATA, Yuichiro PB Institute of Electronics, Information and Communications Engineers (IEICE) YR 2022 SN 0916-8508 SN 1745-1337 JF IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences VO E105.A IS 3 SP 468 OP 477 LK http://dx.doi.org/https://doi.org/10.1587/transfun.2021vlp0009 DO https://doi.org/10.1587/transfun.2021vlp0009 SF ELIB - SuUB Bremen
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