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ILP Based Approaches for Optimizing Early Decompute in Two ..:
USHIODA, Yuya
;
KANEKO, Mineo
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E107.A (2024) 3 - p. 600-609 , 2024
Link:
https://doi.org/10.1587/transfun.2023vlp0020
RT Journal T1 <Title>ILP Based Approaches for Optimizing Early Decompute in Two Level Adiabatic Logic Circuits</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1587_transfun.2023vlp0020&Exemplar=1&LAN=DE A1 USHIODA, Yuya A1 KANEKO, Mineo PB Institute of Electronics, Information and Communications Engineers (IEICE) YR 2024 SN 0916-8508 SN 1745-1337 JF IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences VO E107.A IS 3 SP 600 OP 609 LK http://dx.doi.org/https://doi.org/10.1587/transfun.2023vlp0020 DO https://doi.org/10.1587/transfun.2023vlp0020 SF ELIB - SuUB Bremen
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