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Novel Chip Stacking Methods to Extend Both Horizontally and..:
NAKAHARA, Hiroshi
;
OZAKI, Tomoya
;
MATSUTANI, Hiroki
..
IEICE Transactions on Information and Systems. E99.D (2016) 12 - p. 2871-2880 , 2016
Link:
https://doi.org/10.1587/transinf.2016pap0033
RT Journal T1 <Title>Novel Chip Stacking Methods to Extend Both Horizontally and Vertically for Many-Core Architectures with ThrouChip Interface</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1587_transinf.2016pap0033&Exemplar=1&LAN=DE A1 NAKAHARA, Hiroshi A1 OZAKI, Tomoya A1 MATSUTANI, Hiroki A1 KOIBUCHI, Michihiro A1 AMANO, Hideharu PB Institute of Electronics, Information and Communications Engineers (IEICE) YR 2016 SN 0916-8532 SN 1745-1361 JF IEICE Transactions on Information and Systems VO E99.D IS 12 SP 2871 OP 2880 LK http://dx.doi.org/https://doi.org/10.1587/transinf.2016pap0033 DO https://doi.org/10.1587/transinf.2016pap0033 SF ELIB - SuUB Bremen
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