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Novel integration scheme to pattern low cost sub-100nm dime..:
, In:
2022 IEEE 24th Electronics Packaging Technology Conference (EPTC)
,
Paneri, Abhilash
;
Cummins, Cian
;
Saseendran, Sandeep S
. - p. 542-545 , 2022
Link:
https://doi.org/10.1109/EPTC56328.2022.10013171
RT T1
2022 IEEE 24th Electronics Packaging Technology Conference (EPTC)
: T1
Novel integration scheme to pattern low cost sub-100nm dimensions for Si based sensor devices on 200mm wafers using self-assembled block copolymer (BCP) lithography
UL https://suche.suub.uni-bremen.de/peid=ieee-10013171&Exemplar=1&LAN=DE A1 Paneri, Abhilash A1 Cummins, Cian A1 Saseendran, Sandeep S A1 Tezcan, Deniz S YR 2022 K1 Micromechanical devices K1 Sequential analysis K1 Costs K1 Films K1 Lithography K1 Electronic packaging thermal management K1 Silicon SP 542 OP 545 LK http://dx.doi.org/https://doi.org/10.1109/EPTC56328.2022.10013171 DO https://doi.org/10.1109/EPTC56328.2022.10013171 SF ELIB - SuUB Bremen
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