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1 Ergebnisse
1
Design of 64-bit Floating-Point Arithmetic and Logical Comp..:
, In:
2023 International Conference on Intelligent and Innovative Technologies in Computing, Electrical and Electronics (IITCEE)
,
Bhuvana Suganthi, D.
;
Shivaramaiah, M.
;
Punitha, A.
.. - p. 928-931 , 2023
Link:
https://doi.org/10.1109/IITCEE57236.2023.10091011
RT T1 <cTitle>2023 International Conference on Intelligent and Innovative Technologies in Computing, Electrical and Electronics (IITCEE)</cTitle>: T1 <Title>Design of 64-bit Floating-Point Arithmetic and Logical Complex Operation for High-Speed Processing</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10091011&Exemplar=1&LAN=DE A1 Bhuvana Suganthi, D. A1 Shivaramaiah, M. A1 Punitha, A. A1 K Vidhyalakshmi, M A1 Thaiyalnayaki, S. YR 2023 K1 Memory management K1 Signal processing algorithms K1 Signal processing K1 Hardware K1 Delays K1 Hardware design languages K1 Floating-point arithmetic K1 Floating Point K1 Xilinx K1 Complex Numbers K1 Arithmetic Operations SP 928 OP 931 LK http://dx.doi.org/https://doi.org/10.1109/IITCEE57236.2023.10091011 DO https://doi.org/10.1109/IITCEE57236.2023.10091011 SF ELIB - SuUB Bremen
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