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1 Ergebnisse
1
FPGA Based Area Reduction with Recurrent Neural Network and..:
, In:
2023 IEEE International Conference on Integrated Circuits and Communication Systems (ICICACS)
,
Chetti, Smita C
;
Patil, Shilpa
;
HR, Ramya
.. - p. 01-07 , 2023
Link:
https://doi.org/10.1109/ICICACS57338.2023.10099853
RT T1
2023 IEEE International Conference on Integrated Circuits and Communication Systems (ICICACS)
: T1
FPGA Based Area Reduction with Recurrent Neural Network and VHDL Modelling
UL https://suche.suub.uni-bremen.de/peid=ieee-10099853&Exemplar=1&LAN=DE A1 Chetti, Smita C A1 Patil, Shilpa A1 HR, Ramya A1 Shivakanth, Gandla A1 K S, Shashidhar YR 2023 K1 Power demand K1 Recurrent neural networks K1 Runtime K1 Digital systems K1 Programmable logic arrays K1 Throughput K1 Hardware K1 fpga K1 rnn K1 accelerator K1 radix-2 multiplier K1 lcsla K1 pooling layer K1 activation layer SP 01 OP 07 LK http://dx.doi.org/https://doi.org/10.1109/ICICACS57338.2023.10099853 DO https://doi.org/10.1109/ICICACS57338.2023.10099853 SF ELIB - SuUB Bremen
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