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Integrated Wafer and Die Level Simulation of Back End of Li..:
, In:
2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)
,
Katakamsetty, Ushasree
;
Voykov, Stefan Nikolaev
;
Vasilev, Boris
... - p. 1-3 , 2023
Link:
https://doi.org/10.1109/EDTM55494.2023.10103106
RT T1
2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)
: T1
Integrated Wafer and Die Level Simulation of Back End of Line Chemical Mechanical Polishing Processes
UL https://suche.suub.uni-bremen.de/peid=ieee-10103106&Exemplar=1&LAN=DE A1 Katakamsetty, Ushasree A1 Voykov, Stefan Nikolaev A1 Vasilev, Boris A1 Nakagawa, Sam A1 Tugbawa, Tamba A1 Chee, Jansen A1 Gower-Hall, Aaron A1 Lee, Brian A1 Zhu, Weiyang A1 Li, Bifeng A1 Ichikawa, Kimiko YR 2023 K1 Semiconductor device modeling K1 Predictive models K1 Surfaces K1 Manufacturing K1 Chemicals K1 Optimization K1 CMP variation K1 wafer level K1 die level K1 CMP hotspot SP 1 OP 3 LK http://dx.doi.org/https://doi.org/10.1109/EDTM55494.2023.10103106 DO https://doi.org/10.1109/EDTM55494.2023.10103106 SF ELIB - SuUB Bremen
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