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1 Ergebnisse
1
System Verilog versus UVM-based Verification of AXI4-Lite A..:
, In:
SoutheastCon 2023
,
Babu, Aiswariya Ramesh
;
Anand, Pooja
;
Kim, Youngsoo
. - p. 350-357 , 2023
Link:
https://doi.org/10.1109/SoutheastCon51012.2023.1011514
RT T1
SoutheastCon 2023
: T1
System Verilog versus UVM-based Verification of AXI4-Lite Arbitration
UL https://suche.suub.uni-bremen.de/peid=ieee-10115141&Exemplar=1&LAN=DE A1 Babu, Aiswariya Ramesh A1 Anand, Pooja A1 Kim, Youngsoo A1 Jadhav, Shrikant YR 2023 SN 1558-058X K1 Performance evaluation K1 Simulation K1 Scalability K1 System-on-chip K1 Complexity theory K1 Hardware design languages K1 AXI4-Lite K1 verification K1 arbitration K1 Universal Verification Methodology (UVM) K1 System Verilog (SV) SP 350 OP 357 LK http://dx.doi.org/https://doi.org/10.1109/SoutheastCon51012.2023.10115141 DO https://doi.org/10.1109/SoutheastCon51012.2023.10115141 SF ELIB - SuUB Bremen
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