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DECADES: A 67mm2, 1.46TOPS, 55 Giga Cache-Coherent 64-bit R..:

, In: 2023 IEEE Custom Integrated Circuits Conference (CICC),

Gao, Fei ; Chang, Ting-Jung ; Li, Ang... - p. 1-2 , 2023

Link: https://doi.org/10.1109/CICC57935.2023.10121257

RT 
T1 <cTitle>2023 IEEE Custom Integrated Circuits Conference (CICC)</cTitle>: T1 <Title>DECADES: A 67mm2, 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET</Title>

UL https://suche.suub.uni-bremen.de/peid=ieee-10121257&Exemplar=1&LAN=DE
				
A1 Gao, Fei
A1 Chang, Ting-Jung
A1 Li, Ang
A1 Orenes-Vera, Marcelo
A1 Giri, Davide
A1 Jackson, Paul J.
A1 Ning, August
A1 Tziantzioulis, Georgios
A1 Zuckerman, Joseph
A1 Tu, Jinzheng
A1 Xu, Kaifeng
A1 Chirkov, Grigory
A1 Tombesi, Gabriele
A1 Balkind, Jonathan
A1 Martonosi, Margaret
A1 Carloni, Luca
A1 Wentzlaff, David
YR 2023
SN 2152-3630
K1 Application specific integrated circuits
K1 Program processors
K1 Machine learning
K1 Linear algebra
K1 FinFETs
K1 Linear accelerators
K1 Hardware acceleration
SP 1
OP 2
LK http://dx.doi.org/https://doi.org/10.1109/CICC57935.2023.10121257
DO https://doi.org/10.1109/CICC57935.2023.10121257
SF ELIB - SuUB Bremen

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