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1 Ergebnisse
1
A 7∼10.5-Gb/s Reference-Less Linear Half-rate CDR Circuit U..:
, In:
2023 International VLSI Symposium on Technology, Systems and Applications (VLSI-TSA/VLSI-DAT)
,
Hsu, Yi-En
;
Liu, Shen-Iuan
- p. 1-4 , 2023
Link:
https://doi.org/10.1109/VLSI-TSA/VLSI-DAT57221.2023.10..
RT T1
2023 International VLSI Symposium on Technology, Systems and Applications (VLSI-TSA/VLSI-DAT)
: T1
A 7∼10.5-Gb/s Reference-Less Linear Half-rate CDR Circuit Using Automatic Band Selector
UL https://suche.suub.uni-bremen.de/peid=ieee-10133980&Exemplar=1&LAN=DE A1 Hsu, Yi-En A1 Liu, Shen-Iuan YR 2023 K1 Time-frequency analysis K1 Voltage-controlled oscillators K1 Phase frequency detectors K1 Switches K1 Jitter K1 Very large scale integration K1 Frequency measurement K1 Clock and data recovery K1 reference-less K1 half-rate K1 phase detector K1 frequency acquisition SP 1 OP 4 LK http://dx.doi.org/https://doi.org/10.1109/VLSI-TSA/VLSI-DAT57221.2023.10133980 DO https://doi.org/10.1109/VLSI-TSA/VLSI-DAT57221.2023.10133980 SF ELIB - SuUB Bremen
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