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1 Ergebnisse
1
Designing 64-Bit LUT based FFT Structure for High-Speed DSP..:
, In:
2023 IEEE 12th International Conference on Communication Systems and Network Technologies (CSNT)
,
Bharathi, M.
;
Sai, G. Amrutha
;
Sree, B. Divya
... - p. 31-34 , 2023
Link:
https://doi.org/10.1109/CSNT57126.2023.10134710
RT T1 <cTitle>2023 IEEE 12th International Conference on Communication Systems and Network Technologies (CSNT)</cTitle>: T1 <Title>Designing 64-Bit LUT based FFT Structure for High-Speed DSP Applications</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10134710&Exemplar=1&LAN=DE A1 Bharathi, M. A1 Sai, G. Amrutha A1 Sree, B. Divya A1 Bharadwaj Karthik, K A1 Naik, B. Uday Kiran A1 Shirur, Yasha Jyothi YR 2023 SN 2473-5655 K1 Fast Fourier transforms K1 Digital signal processing K1 Logic gates K1 Real-time systems K1 Table lookup K1 Delays K1 Hardware design languages K1 Distributed Arithmetic (DA) K1 Power Spectral Density (PSD) K1 Fast Fourier Transform (FFT) K1 Look-up Table (LUT) SP 31 OP 34 LK http://dx.doi.org/https://doi.org/10.1109/CSNT57126.2023.10134710 DO https://doi.org/10.1109/CSNT57126.2023.10134710 SF ELIB - SuUB Bremen
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