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1 Ergebnisse
1
Comparative Analysis of EEPL and PPL Techniques in 18nm Fin..:
, In:
2023 IEEE Devices for Integrated Circuit (DevIC)
,
Rana, Gautam
;
Sharma, Kulbhushan
;
Sharma, Anjali
.. - p. 30-33 , 2023
Link:
https://doi.org/10.1109/DevIC57758.2023.10134850
RT T1
2023 IEEE Devices for Integrated Circuit (DevIC)
: T1
Comparative Analysis of EEPL and PPL Techniques in 18nm FinFET Technology
UL https://suche.suub.uni-bremen.de/peid=ieee-10134850&Exemplar=1&LAN=DE A1 Rana, Gautam A1 Sharma, Kulbhushan A1 Sharma, Anjali A1 Gupta, Lipika A1 Sachdeva, Ashish YR 2023 K1 Performance evaluation K1 Transient response K1 Logic circuits K1 FinFETs K1 Power dissipation K1 Delays K1 Circuit synthesis K1 FinFET K1 push-pull pass transistor logic K1 energy economized pass transistor logic SP 30 OP 33 LK http://dx.doi.org/https://doi.org/10.1109/DevIC57758.2023.10134850 DO https://doi.org/10.1109/DevIC57758.2023.10134850 SF ELIB - SuUB Bremen
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