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1 Ergebnisse
1
FPGA-Based Accelerator for Rank-Enhanced and Highly-Pruned ..:
, In:
2023 Design, Automation & Test in Europe Conference & Exhibition (DATE)
,
Song, Haena
;
Yoon, Jongho
;
Kim, Dohun
... - p. 1-6 , 2023
Link:
https://doi.org/10.23919/DATE56975.2023.10137111
RT T1 <cTitle>2023 Design, Automation & Test in Europe Conference & Exhibition (DATE)</cTitle>: T1 <Title>FPGA-Based Accelerator for Rank-Enhanced and Highly-Pruned Block-Circulant Neural Networks</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10137111&Exemplar=1&LAN=DE A1 Song, Haena A1 Yoon, Jongho A1 Kim, Dohun A1 Kwon, Eunji A1 Oh, Tae-Hyun A1 Kang, Seokhyeong YR 2023 SN 1558-1101 K1 Degradation K1 Deep learning K1 Image coding K1 Embedded systems K1 Neural networks K1 Graphics processing units K1 Hardware K1 Network Compression K1 Structured Pruning K1 CNN Accelerator K1 FPGA K1 Convolution Neural Networks SP 1 OP 6 LK http://dx.doi.org/https://doi.org/10.23919/DATE56975.2023.10137111 DO https://doi.org/10.23919/DATE56975.2023.10137111 SF ELIB - SuUB Bremen
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