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1 Ergebnisse
1
Effective and Efficient Testing of Large Numbers of Inter-D..:
, In:
2023 IEEE 41st VLSI Test Symposium (VTS)
,
Chuang, Po-Yao
;
Lorenzelli, Francesco
;
Chakravarty, Sreejit
... - p. 1-6 , 2023
Link:
https://doi.org/10.1109/VTS56346.2023.10140006
RT T1
2023 IEEE 41st VLSI Test Symposium (VTS)
: T1
Effective and Efficient Testing of Large Numbers of Inter-Die Interconnects in Chiplet-Based Multi-Die Packages
UL https://suche.suub.uni-bremen.de/peid=ieee-10140006&Exemplar=1&LAN=DE A1 Chuang, Po-Yao A1 Lorenzelli, Francesco A1 Chakravarty, Sreejit A1 Wu, Cheng-Wen A1 Gielen, Georges A1 Marinissen, Erik Jan YR 2023 SN 2375-1053 K1 Codes K1 Layout K1 Clustering algorithms K1 Very large scale integration K1 Automatic test pattern generation K1 Partitioning algorithms K1 Manufacturing SP 1 OP 6 LK http://dx.doi.org/https://doi.org/10.1109/VTS56346.2023.10140006 DO https://doi.org/10.1109/VTS56346.2023.10140006 SF ELIB - SuUB Bremen
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