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1 Ergebnisse
1
Five-Stage Pipelined MIPS Processor Verification Driver Mod..:
, In:
2023 International Conference on Sustainable Computing and Smart Systems (ICSCSS)
,
Deny, J.
;
Deepika, Duggirala Lakshmi Sai
;
Lekhana, Vempa
.. - p. 1344-1347 , 2023
Link:
https://doi.org/10.1109/ICSCSS57650.2023.10169277
RT T1 <cTitle>2023 International Conference on Sustainable Computing and Smart Systems (ICSCSS)</cTitle>: T1 <Title>Five-Stage Pipelined MIPS Processor Verification Driver Module using UVM</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10169277&Exemplar=1&LAN=DE A1 Deny, J. A1 Deepika, Duggirala Lakshmi Sai A1 Lekhana, Vempa A1 Vandana, Gonuguntla A1 Devi, Katta Gayathri YR 2023 K1 Codes K1 Automation K1 Very large scale integration K1 Complexity theory K1 Synchronization K1 Time-domain analysis K1 Object oriented programming K1 Universal Verification Methodology (UVM) K1 Five-Stage Pipeline K1 Microprocessor without interlocked pipelined stages (MIPS) K1 Constrained Randomization K1 Transaction Level Modeling (TLM) ports K1 Arithmetic Logic Unit (ALU) K1 Sequencer K1 Driver K1 Scoreboard SP 1344 OP 1347 LK http://dx.doi.org/https://doi.org/10.1109/ICSCSS57650.2023.10169277 DO https://doi.org/10.1109/ICSCSS57650.2023.10169277 SF ELIB - SuUB Bremen
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