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1 Ergebnisse
1
Graph Representation Learning for Parasitic Impedance Predi..:
, In:
2023 IEEE International Symposium on Circuits and Systems (ISCAS)
,
Shrestha, Pratik
;
Savidis, Ioannis
- p. 1-5 , 2023
Link:
https://doi.org/10.1109/ISCAS46773.2023.10181447
RT T1
2023 IEEE International Symposium on Circuits and Systems (ISCAS)
: T1
Graph Representation Learning for Parasitic Impedance Prediction of the Interconnect
UL https://suche.suub.uni-bremen.de/peid=ieee-10181447&Exemplar=1&LAN=DE A1 Shrestha, Pratik A1 Savidis, Ioannis YR 2023 SN 2158-1525 K1 Training K1 Representation learning K1 Integrated circuit interconnections K1 Predictive models K1 Benchmark testing K1 Routing K1 Capacitance K1 parasitic prediction K1 physical design K1 machine learning K1 graph convolutional networks SP 1 OP 5 LK http://dx.doi.org/https://doi.org/10.1109/ISCAS46773.2023.10181447 DO https://doi.org/10.1109/ISCAS46773.2023.10181447 SF ELIB - SuUB Bremen
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