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1 Ergebnisse
1
A $2.53 \mu \mathrm{W}/\text{channel}$ Event-Driven Neural ..:
, In:
2023 IEEE International Symposium on Circuits and Systems (ISCAS)
,
Jiang, Hao
;
Zheng, Jiapei
;
Wang, Yunzhengmao
... - p. 1-5 , 2023
Link:
https://doi.org/10.1109/ISCAS46773.2023.10181615
RT T1
2023 IEEE International Symposium on Circuits and Systems (ISCAS)
: T1
A $2.53 \mu \mathrm{W}/\text{channel}$ Event-Driven Neural Spike Sorting Processor with Sparsity-Aware Computing-In-Memory Macros
UL https://suche.suub.uni-bremen.de/peid=ieee-10181615&Exemplar=1&LAN=DE A1 Jiang, Hao A1 Zheng, Jiapei A1 Wang, Yunzhengmao A1 Zhang, Jinshan A1 Zhu, Haozhe A1 Lyu, Liangjian A1 Chen, Yingping A1 Chen, Chixiao A1 Liu, Qi YR 2023 SN 2158-1525 K1 Program processors K1 Power demand K1 Neurons K1 Signal processing algorithms K1 Prototypes K1 Voltage K1 Energy efficiency K1 spike sorting K1 template matching K1 on-chip learning K1 event-driven K1 adaptive threshold K1 computing-in-memory K1 sparsity K1 low power SP 1 OP 5 LK http://dx.doi.org/https://doi.org/10.1109/ISCAS46773.2023.10181615 DO https://doi.org/10.1109/ISCAS46773.2023.10181615 SF ELIB - SuUB Bremen
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