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1 Ergebnisse
1
Grain Size Reduction of Ferroelectric HZO Enabled by a Nove..:
, In:
2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
,
Zhang, Dong
;
Wu, Jixuan
;
Kong, Qiwen
... - p. 1-2 , 2023
Link:
https://doi.org/10.23919/VLSITechnologyandCir57934.202..
RT T1 <cTitle>2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)</cTitle>: T1 <Title>Grain Size Reduction of Ferroelectric HZO Enabled by a Novel Solid Phase Epitaxy (SPE) Approach: Working Principle, Experimental Demonstration, and Theoretical Understanding</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10185216&Exemplar=1&LAN=DE A1 Zhang, Dong A1 Wu, Jixuan A1 Kong, Qiwen A1 Zhou, Zuopu A1 Liu, Long A1 Han, Kaizhen A1 Sun, Chen A1 Wang, Xiaolin A1 Liu, Gan A1 Jiao, Leming A1 Zheng, Zijie A1 Kang, Yuye A1 Chen, Jiezhi A1 Gong, Xiao YR 2023 SN 2158-9682 K1 Grain size K1 Grain boundaries K1 Technological innovation K1 Annealing K1 Capacitors K1 Very large scale integration K1 Solids SP 1 OP 2 LK http://dx.doi.org/https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185216 DO https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185216 SF ELIB - SuUB Bremen
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