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1 Ergebnisse
1
A 24-30 GHz Cascaded QPLL Achieving 56.8-fs RMS Jitter and ..:
, In:
2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
,
Wang, Li
;
Liu, Zilu
;
Yue, C. Patrick
- p. 1-2 , 2023
Link:
https://doi.org/10.23919/VLSITechnologyandCir57934.202..
RT T1 <cTitle>2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)</cTitle>: T1 <Title>A 24-30 GHz Cascaded QPLL Achieving 56.8-fs RMS Jitter and −248.6-dB FoMjitter</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10185269&Exemplar=1&LAN=DE A1 Wang, Li A1 Liu, Zilu A1 Yue, C. Patrick YR 2023 SN 2158-9682 K1 Phase noise K1 Prototypes K1 Detectors K1 Jitter K1 Very large scale integration K1 Topology K1 High dynamic range SP 1 OP 2 LK http://dx.doi.org/https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185269 DO https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185269 SF ELIB - SuUB Bremen
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