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1 Ergebnisse
1
First Stacked Nanosheet FeFET Featuring Memory Window of 1...:
, In:
2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
,
Chen, Yu-Rui
;
Liu, Yi-Chun
;
Zhao, Zefu
... - p. 1-2 , 2023
Link:
https://doi.org/10.23919/VLSITechnologyandCir57934.202..
RT T1
2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
: T1
First Stacked Nanosheet FeFET Featuring Memory Window of 1.8V at Record Low Write Voltage of 2V and Endurance >1E11 Cycles
UL https://suche.suub.uni-bremen.de/peid=ieee-10185284&Exemplar=1&LAN=DE A1 Chen, Yu-Rui A1 Liu, Yi-Chun A1 Zhao, Zefu A1 Hsieh, Wan-Hsuan A1 Lee, Jia-Yang A1 Tu, Chien-Te A1 Huang, Bo-Wei A1 Wang, Jer-Fu A1 Chueh, Shee-Jier A1 Xing, Yifan A1 Chen, Guan-Hua A1 Chou, Hung-Chun A1 Woo, Dong Soo A1 Lee, M. H. A1 Liu, C. W. YR 2023 SN 2158-9682 K1 Zirconium K1 Gallium arsenide K1 Superlattices K1 Voltage K1 Computer architecture K1 Very large scale integration K1 Phosphorus SP 1 OP 2 LK http://dx.doi.org/https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185284 DO https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185284 SF ELIB - SuUB Bremen
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