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1 Ergebnisse
1
First Demonstration of BEOL-Compatible MFMIS Fe-FETs with 3..:
, In:
2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
,
Wang, Xiaolin
;
Zheng, Zijie
;
Kong, Qiwen
... - p. 1-2 , 2023
Link:
https://doi.org/10.23919/VLSITechnologyandCir57934.202..
RT T1 <cTitle>2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)</cTitle>: T1 <Title>First Demonstration of BEOL-Compatible MFMIS Fe-FETs with 3D Multi-Fin Floating Gate: In-situ ALD-deposited MFM, LCH of 50 nm,> 2×109 Endurance, and 58.3% Area Saving</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10185306&Exemplar=1&LAN=DE A1 Wang, Xiaolin A1 Zheng, Zijie A1 Kong, Qiwen A1 Jiao, Leming A1 Han, Kaizhen A1 Sun, Chen A1 Zhou, Zuopu A1 Liu, Long A1 Kang, Yuye A1 Liu, Gan A1 Zhang, Dong A1 Gong, Xiao YR 2023 SN 2158-9682 K1 Three-dimensional displays K1 Annealing K1 Nonvolatile memory K1 Capacitors K1 Switches K1 Very large scale integration K1 Logic gates SP 1 OP 2 LK http://dx.doi.org/https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185306 DO https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185306 SF ELIB - SuUB Bremen
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