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1 Ergebnisse
1
A Low-Voltage Area-Efficient TSV I/O for HBM with Data Rate..:
, In:
2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
,
Kim, Taeryeong
;
Kim, Ji-Young
;
You, Jeonghyeok
... - p. 1-2 , 2023
Link:
https://doi.org/10.23919/VLSITechnologyandCir57934.202..
RT T1
2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
: T1
A Low-Voltage Area-Efficient TSV I/O for HBM with Data Rate up to 15Gb/s Featuring Overlapped Multiplexing Driver, ISI Compensators and QEC
UL https://suche.suub.uni-bremen.de/peid=ieee-10185328&Exemplar=1&LAN=DE A1 Kim, Taeryeong A1 Kim, Ji-Young A1 You, Jeonghyeok A1 Chae, Hohyun A1 Moon, Byoung Mo A1 Sohn, Kyomin A1 Jung, Seong-Ook YR 2023 SN 2158-9682 K1 Multiplexing K1 Low voltage K1 Energy measurement K1 Very large scale integration K1 CMOS process K1 Energy efficiency K1 Decision feedback equalizers SP 1 OP 2 LK http://dx.doi.org/https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185328 DO https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185328 SF ELIB - SuUB Bremen
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