I agree that this site is using cookies. You can find further informations
here
.
X
Login
Merkliste (
0
)
Home
About us
Home About us
Our history
Profile
Press & public relations
Friends
The library in figures
Exhibitions
Projects
Training, internships, careers
Films
Services & Information
Home Services & Information
Lending and interlibrary loans
Returns and renewals
Training and library tours
My Account
Library cards
New to the library?
Download Information
Opening hours
Learning spaces
PC, WLAN, copy, scan and print
Catalogs and collections
Home Catalogs and Collections
Rare books and manuscripts
Digital collections
Subject Areas
Our sites
Home Our sites
Central Library
Law Library (Juridicum)
BB Business and Economics (BB11)
BB Physics and Electrical Engineering
TB Engineering and Social Sciences
TB Economics and Nautical Sciences
TB Music
TB Art & Design
TB Bremerhaven
Contact the library
Home Contact the library
Staff Directory
Open access & publishing
Home Open access & publishing
Reference management: Citavi & RefWorks
Publishing documents
Open Access in Bremen
zur Desktop-Version
Toggle navigation
Merkliste
1 Ergebnisse
1
A 14nm 128Mb Embedded MRAM Macro achieved the Best Figure-O..:
, In:
2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
,
Kang, Gyuseong
;
Shin, Hyunjin
;
Jung, Hyuntaek
... - p. 1-2 , 2023
Link:
https://doi.org/10.23919/VLSITechnologyandCir57934.202..
RT T1 <cTitle>2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)</cTitle>: T1 <Title>A 14nm 128Mb Embedded MRAM Macro achieved the Best Figure-Of-Merit with 80MHz Read operation and 18.1Mb/mm² implementation at 0.64V</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10185352&Exemplar=1&LAN=DE A1 Kang, Gyuseong A1 Shin, Hyunjin A1 Jung, Hyuntaek A1 Lee, Sunkyu A1 Choi, Jaeseung A1 Baek, Sangyeop A1 Jung, Hyunsung A1 Kim, Daeshik A1 Hwang, Sohee A1 Han, Shinhee A1 Ji, Yongsung A1 Yoon, Sei Seung YR 2023 SN 2158-9682 K1 Temperature measurement K1 Voltage measurement K1 Torque K1 Regulators K1 Random access memory K1 Switches K1 Very large scale integration SP 1 OP 2 LK http://dx.doi.org/https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185352 DO https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185352 SF ELIB - SuUB Bremen
Export
RefWorks (nur Desktop-Version!)
Flow
(Zuerst in
Flow
einloggen, dann importieren)
