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Arvon: A Heterogeneous SiP Integrating a 14nm FPGA and Two ..:

, In: 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits),

Tang, Wei ; Cho, Sung-Gun ; Hoang, Tim Tri... - p. 1-2 , 2023

Link: https://doi.org/10.23919/VLSITechnologyandCir57934.202..

RT 
T1 <cTitle>2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)</cTitle>: T1 <Title>Arvon: A Heterogeneous SiP Integrating a 14nm FPGA and Two 22nm 1.8TFLOPS/W DSPs with 1.7Tbps/mm2 AIB 2.0 Interface to Provide Versatile Workload Acceleration</Title>

UL https://suche.suub.uni-bremen.de/peid=ieee-10185388&Exemplar=1&LAN=DE
				
A1 Tang, Wei
A1 Cho, Sung-Gun
A1 Hoang, Tim Tri
A1 Botimer, Jacob
A1 Zhu, Wei Qiang
A1 Chang, Ching-Chi
A1 Lu, Cheng-Hsun
A1 Zhu, Junkang
A1 Tao, Yaoyu
A1 Wei, Tianyu
A1 Motwani, Naomi Kavi
A1 Yalamanchi, Mani
A1 Yarlagadda, Ramya
A1 Kale, Sirisha
A1 Flanigan, Mark
A1 Chan, Allen
A1 Tran, Thungoc
A1 Shumarayev, Sergey
A1 Zhang, Zhengya
YR 2023
SN 2158-9682
K1 Prototypes
K1 Integrated circuit interconnections
K1 Bridge circuits
K1 Bandwidth
K1 Artificial neural networks
K1 Very large scale integration
K1 Field programmable gate arrays
SP 1
OP 2
LK http://dx.doi.org/https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185388
DO https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185388
SF ELIB - SuUB Bremen

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