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1 Ergebnisse
1
Noise Performance Improvements of 2-Layer Transistor Pixel ..:
, In:
2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
,
Kikuchi, Y.
;
Tomita, M.
;
Hayashi, T.
... - p. 1-2 , 2023
Link:
https://doi.org/10.23919/VLSITechnologyandCir57934.202..
RT T1 <cTitle>2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)</cTitle>: T1 <Title>Noise Performance Improvements of 2-Layer Transistor Pixel Stacked CMOS Image Sensor with Non-doped Pixel-FinFETs</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10185422&Exemplar=1&LAN=DE A1 Kikuchi, Y. A1 Tomita, M. A1 Hayashi, T. A1 Chiba, H. A1 Ogita, T. A1 Okawa, T. A1 Nishida, K. A1 Sugimoto, M. A1 Yoneyama, D. A1 Umeki, T. A1 Oishi, H. A1 Miyake, S. A1 Hiramatsu, K. A1 Kumano, H. A1 Kawashima, H. A1 Yamada, N. A1 Tamura, M. A1 Ohnuma, H. A1 Tatani, K. YR 2023 SN 2158-9682 K1 Performance evaluation K1 Impurities K1 Field effect transistors K1 Noise reduction K1 Prototypes K1 CMOS image sensors K1 Very large scale integration SP 1 OP 2 LK http://dx.doi.org/https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185422 DO https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185422 SF ELIB - SuUB Bremen
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