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1 Ergebnisse
1
A 2.38 MCells/mm2 9.81 -350 TOPS/W RRAM Compute-in-Memory M..:
, In:
2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
,
Spetalnick, Samuel D.
;
Chang, Muya
;
Konno, Shota
... - p. 1-2 , 2023
Link:
https://doi.org/10.23919/VLSITechnologyandCir57934.202..
RT T1 <cTitle>2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)</cTitle>: T1 <Title>A 2.38 MCells/mm2 9.81 -350 TOPS/W RRAM Compute-in-Memory Macro in 40nm CMOS with Hybrid Offset/IOFF Cancellation and ICELL RBLSL Drop Mitigation</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10185424&Exemplar=1&LAN=DE A1 Spetalnick, Samuel D. A1 Chang, Muya A1 Konno, Shota A1 Crafton, Brian A1 Lele, Ashwin S. A1 Khwa, Win-San A1 Chih, Yu-Der A1 Chang, Meng-Fan A1 Raychowdhury, Arijit YR 2023 SN 2158-9682 K1 Resistance K1 Art K1 Bit error rate K1 Voltage K1 Very large scale integration K1 CMOS technology K1 Common Information Model (computing) SP 1 OP 2 LK http://dx.doi.org/https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185424 DO https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185424 SF ELIB - SuUB Bremen
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