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1 Ergebnisse
1
A Study on influence of geometric parameters in Gate All Ar..:
, In:
2023 2nd International Conference on Advancements in Electrical, Electronics, Communication, Computing and Automation (ICAECA)
,
Sundari T, Jaspar Vinitha
;
Paramasivam, K.
;
V P, Sakthipriyanka
.. - p. 1-6 , 2023
Link:
https://doi.org/10.1109/ICAECA56562.2023.10200842
RT T1 <cTitle>2023 2nd International Conference on Advancements in Electrical, Electronics, Communication, Computing and Automation (ICAECA)</cTitle>: T1 <Title>A Study on influence of geometric parameters in Gate All Around Transistors</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10200842&Exemplar=1&LAN=DE A1 Sundari T, Jaspar Vinitha A1 Paramasivam, K. A1 V P, Sakthipriyanka A1 P, Charunivetha A1 S R, Vidhya YR 2023 K1 Performance evaluation K1 Doping K1 Logic gates K1 Ions K1 Nanoscale devices K1 Threshold voltage K1 Silicon K1 Gate All around transistors K1 Nanowire K1 Subthreshold Slope K1 On and Off current SP 1 OP 6 LK http://dx.doi.org/https://doi.org/10.1109/ICAECA56562.2023.10200842 DO https://doi.org/10.1109/ICAECA56562.2023.10200842 SF ELIB - SuUB Bremen
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