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A Hardware Design Generator of High-Performance FIFO-Based ..:
, In:
2023 30th International Conference on Mixed Design of Integrated Circuits and System (MIXDES)
,
Petrovic, Marija L.
;
Milovanovic, Vladimir M.
- p. 79-82 , 2023
Link:
https://doi.org/10.23919/MIXDES58562.2023.10203246
RT T1
2023 30th International Conference on Mixed Design of Integrated Circuits and System (MIXDES)
: T1
A Hardware Design Generator of High-Performance FIFO-Based Linear Insertion Streaming Sorters
UL https://suche.suub.uni-bremen.de/peid=ieee-10203246&Exemplar=1&LAN=DE A1 Petrovic, Marija L. A1 Milovanovic, Vladimir M. YR 2023 K1 Power demand K1 Memory management K1 Generators K1 Hardware K1 Space exploration K1 Resource management K1 Hardware design languages K1 Linear insertion sorters K1 Chisel hardware design language K1 FPGA K1 design generator SP 79 OP 82 LK http://dx.doi.org/https://doi.org/10.23919/MIXDES58562.2023.10203246 DO https://doi.org/10.23919/MIXDES58562.2023.10203246 SF ELIB - SuUB Bremen
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