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1 Ergebnisse
1
Essential Steps to Enable Analyzing Effective Resistance of..:
, In:
2023 China Semiconductor Technology International Conference (CSTIC)
,
Feng, Frank
;
Huang, Abner
;
Huang, Joe
... - p. 1-4 , 2023
Link:
https://doi.org/10.1109/CSTIC58779.2023.10219396
RT T1 <cTitle>2023 China Semiconductor Technology International Conference (CSTIC)</cTitle>: T1 <Title>Essential Steps to Enable Analyzing Effective Resistance of ESD Paths-PG Routing Network Pruning and Resistance Contribution by Layer</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10219396&Exemplar=1&LAN=DE A1 Feng, Frank A1 Huang, Abner A1 Huang, Joe A1 Chiou, Dawson A1 Byrd, Jeff A1 Palmer, Nicholas A1 McFalls, Charles A1 Gore, Akhil A. YR 2023 K1 Resistance K1 Semiconductor device measurement K1 Layout K1 Integrated circuit interconnections K1 Production K1 Reliability theory K1 Electrostatic discharges SP 1 OP 4 LK http://dx.doi.org/https://doi.org/10.1109/CSTIC58779.2023.10219396 DO https://doi.org/10.1109/CSTIC58779.2023.10219396 SF ELIB - SuUB Bremen
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