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1 Ergebnisse
1
Compact Model Parameter Extraction using Bayesian Machine L..:
, In:
2023 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
,
Bhat, Sachin
;
Kulkarni, Sourabh
;
Moritz, Csaba Andras
- p. 1-6 , 2023
Link:
https://doi.org/10.1109/ISVLSI59464.2023.10238563
RT T1
2023 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
: T1
Compact Model Parameter Extraction using Bayesian Machine Learning
UL https://suche.suub.uni-bremen.de/peid=ieee-10238563&Exemplar=1&LAN=DE A1 Bhat, Sachin A1 Kulkarni, Sourabh A1 Moritz, Csaba Andras YR 2023 SN 2159-3477 K1 Machine learning algorithms K1 Machine learning K1 Very large scale integration K1 FinFETs K1 Capacitance K1 Bayes methods K1 Transistors K1 Compact model K1 Parameter extraction K1 Bayesian optimization K1 Machine Learning SP 1 OP 6 LK http://dx.doi.org/https://doi.org/10.1109/ISVLSI59464.2023.10238563 DO https://doi.org/10.1109/ISVLSI59464.2023.10238563 SF ELIB - SuUB Bremen
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