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1 Ergebnisse
1
A Bit-Width Reducing Method for Ising Models Guaranteeing t..:
, In:
2023 IEEE 36th International System-on-Chip Conference (SOCC)
,
Yachi, Yuta
;
Tawada, Masashi
;
Togawa, Nozomu
- p. 1-6 , 2023
Link:
https://doi.org/10.1109/SOCC58585.2023.10256935
RT T1
2023 IEEE 36th International System-on-Chip Conference (SOCC)
: T1
A Bit-Width Reducing Method for Ising Models Guaranteeing the Ground-State Output
UL https://suche.suub.uni-bremen.de/peid=ieee-10256935&Exemplar=1&LAN=DE A1 Yachi, Yuta A1 Tawada, Masashi A1 Togawa, Nozomu YR 2023 SN 2164-1706 K1 Annealing K1 Computational modeling K1 Stationary state K1 Data structures K1 Hardware K1 Data models K1 Topology K1 Ising model K1 Ising machine K1 quantum annealing K1 coefficient bit-width reducing K1 combinatorial optimization problem SP 1 OP 6 LK http://dx.doi.org/https://doi.org/10.1109/SOCC58585.2023.10256935 DO https://doi.org/10.1109/SOCC58585.2023.10256935 SF ELIB - SuUB Bremen
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