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1 Ergebnisse
1
Design and Implementation of a Fully Pipelined and Paramete..:
, In:
2023 3rd Asian Conference on Innovation in Technology (ASIANCON)
,
S, Gauri
;
K N, Sreehari
;
Bhakthavatchalu, Ramesh
- p. 1-7 , 2023
Link:
https://doi.org/10.1109/ASIANCON58793.2023.10269923
RT T1
2023 3rd Asian Conference on Innovation in Technology (ASIANCON)
: T1
Design and Implementation of a Fully Pipelined and Parameterizable Hardware Accelerator for BLAKE2 Cryptographic Hash Function in FPGA
UL https://suche.suub.uni-bremen.de/peid=ieee-10269923&Exemplar=1&LAN=DE A1 S, Gauri A1 K N, Sreehari A1 Bhakthavatchalu, Ramesh YR 2023 K1 Technological innovation K1 Online banking K1 Pipelines K1 Computer architecture K1 Cryptographic hash function K1 Software K1 Delays K1 cryptographic hash functions K1 Blake2b hash function K1 performance improvement K1 fully pipelined accelerator K1 FPGA K1 Vivado Design Suite K1 latency reduction SP 1 OP 7 LK http://dx.doi.org/https://doi.org/10.1109/ASIANCON58793.2023.10269923 DO https://doi.org/10.1109/ASIANCON58793.2023.10269923 SF ELIB - SuUB Bremen
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