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1 Ergebnisse
1
FPGA-Based 8x8 Bits Signed Multipliers Using LUTs:
, In:
2023 IEEE Canadian Conference on Electrical and Computer Engineering (CCECE)
,
Chabini, Noureddine
;
Beguenane, Rachid
- p. 366-370 , 2023
Link:
https://doi.org/10.1109/CCECE58730.2023.10288715
RT T1
2023 IEEE Canadian Conference on Electrical and Computer Engineering (CCECE)
: T1
FPGA-Based 8x8 Bits Signed Multipliers Using LUTs
UL https://suche.suub.uni-bremen.de/peid=ieee-10288715&Exemplar=1&LAN=DE A1 Chabini, Noureddine A1 Beguenane, Rachid YR 2023 SN 2576-7046 K1 VHDL K1 Finite impulse response filters K1 Logic gates K1 Table lookup K1 Field programmable gate arrays K1 FPGA K1 LUT K1 DSP Blocks K1 Signed Multipliers K1 Baugh-Wooley K1 Sign-Magnitude K1 FIR SP 366 OP 370 LK http://dx.doi.org/https://doi.org/10.1109/CCECE58730.2023.10288715 DO https://doi.org/10.1109/CCECE58730.2023.10288715 SF ELIB - SuUB Bremen
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