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1 Ergebnisse
1
Crosstalk Mitigated On-chip Interconnect Design for High-sp..:
, In:
2023 IEEE 32nd Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)
,
Kim, Juneyoung
;
Choi, Seonguk
;
Kim, Seongguk
... - p. 1-3 , 2023
Link:
https://doi.org/10.1109/EPEPS58208.2023.10314942
RT T1 <cTitle>2023 IEEE 32nd Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)</cTitle>: T1 <Title>Crosstalk Mitigated On-chip Interconnect Design for High-speed Network-on-Chip (NoC) of Full Wafer Scale Chip (FWSC)</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10314942&Exemplar=1&LAN=DE A1 Kim, Juneyoung A1 Choi, Seonguk A1 Kim, Seongguk A1 Kim, Jihun A1 Sim, Boogyo A1 Lee, Junghyun A1 Shin, Taein A1 Kim, Hyunwoo A1 Hong, Jonghyun A1 Kim, Haeyeon A1 Park, Joonsang A1 Kim, Joungho YR 2023 SN 2165-4115 K1 Timing jitter K1 Three-dimensional displays K1 Equalizers K1 Simulation K1 Integrated circuit interconnections K1 Crosstalk K1 Network-on-chip K1 eye-diagram K1 full wafer scale chip K1 network-on-chip K1 on-chip interconnect K1 signal integrity SP 1 OP 3 LK http://dx.doi.org/https://doi.org/10.1109/EPEPS58208.2023.10314942 DO https://doi.org/10.1109/EPEPS58208.2023.10314942 SF ELIB - SuUB Bremen
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