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1 Ergebnisse
1
A 16-bit Floating-Point Near-SRAM Architecture for Low-powe..:
, In:
2023 IFIP/IEEE 31st International Conference on Very Large Scale Integration (VLSI-SoC)
,
Eggermann, Gregoire
;
Rios, Marco
;
Ansaloni, Giovanni
.. - p. 1-6 , 2023
Link:
https://doi.org/10.1109/VLSI-SoC57769.2023.10321838
RT T1
2023 IFIP/IEEE 31st International Conference on Very Large Scale Integration (VLSI-SoC)
: T1
A 16-bit Floating-Point Near-SRAM Architecture for Low-power Sparse Matrix-Vector Multiplication
UL https://suche.suub.uni-bremen.de/peid=ieee-10321838&Exemplar=1&LAN=DE A1 Eggermann, Gregoire A1 Rios, Marco A1 Ansaloni, Giovanni A1 Nassif, Sani A1 Atienza, David YR 2023 SN 2324-8440 K1 Scalability K1 Random access memory K1 Computer architecture K1 Parallel processing K1 Very large scale integration K1 Sparse matrices K1 Artificial intelligence K1 Near-memory computing K1 Sparse matrix-vector multiplication K1 Edge computing SP 1 OP 6 LK http://dx.doi.org/https://doi.org/10.1109/VLSI-SoC57769.2023.10321838 DO https://doi.org/10.1109/VLSI-SoC57769.2023.10321838 SF ELIB - SuUB Bremen
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