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Methodology for the implementation of Memristor models in F..:
, In:
2023 20th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE)
,
Torres-Arce, Juan Manuel
;
Sarmiento-Reyes, Arturo
;
de Jesus Rangel-Magdaleno, Jose
- p. 1-6 , 2023
Link:
https://doi.org/10.1109/CCE60043.2023.10332901
RT T1 <cTitle>2023 20th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE)</cTitle>: T1 <Title>Methodology for the implementation of Memristor models in FPGA</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10332901&Exemplar=1&LAN=DE A1 Torres-Arce, Juan Manuel A1 Sarmiento-Reyes, Arturo A1 de Jesus Rangel-Magdaleno, Jose YR 2023 SN 2642-3766 K1 Resistance K1 Systematics K1 Neuromorphic engineering K1 Computational modeling K1 Memristors K1 Logic gates K1 Electrical engineering computing K1 Memristor K1 FPGA K1 Hardware K1 Memristive models K1 VHDL SP 1 OP 6 LK http://dx.doi.org/https://doi.org/10.1109/CCE60043.2023.10332901 DO https://doi.org/10.1109/CCE60043.2023.10332901 SF ELIB - SuUB Bremen
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