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1
Definition of a SoC Architecture for a High-Rate Correlator..:
, In:
2023 38th Conference on Design of Circuits and Integrated Systems (DCIS)
,
Molto, David
;
Cubero, Miguel
;
Aparicio-Esteve, Elena
... - p. 1-6 , 2023
Link:
https://doi.org/10.1109/DCIS58620.2023.10335998
RT T1
2023 38th Conference on Design of Circuits and Integrated Systems (DCIS)
: T1
Definition of a SoC Architecture for a High-Rate Correlator Bank
UL https://suche.suub.uni-bremen.de/peid=ieee-10335998&Exemplar=1&LAN=DE A1 Molto, David A1 Cubero, Miguel A1 Aparicio-Esteve, Elena A1 Hernandez, Alvaro A1 Villadangos, Jose M. A1 Urena, Jesus YR 2023 SN 2640-5563 K1 Optical filters K1 Three-dimensional displays K1 Stimulated emission K1 Light emitting diodes K1 Photoreceptors K1 Optical receivers K1 Adaptive optics K1 Indoor optical positioning system K1 matched filtering K1 correlator bank K1 FPGA SP 1 OP 6 LK http://dx.doi.org/https://doi.org/10.1109/DCIS58620.2023.10335998 DO https://doi.org/10.1109/DCIS58620.2023.10335998 SF ELIB - SuUB Bremen
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