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A Simple Power Analysis of an FPGA implementation of a poly..:
, In:
2023 38th Conference on Design of Circuits and Integrated Systems (DCIS)
,
Camacho-Ruiz, Eros
;
Sanchez-Solano, Santiago
;
Martinez-Rodriguez, Macarena C.
.. - p. 1-6 , 2023
Link:
https://doi.org/10.1109/DCIS58620.2023.10336001
RT T1
2023 38th Conference on Design of Circuits and Integrated Systems (DCIS)
: T1
A Simple Power Analysis of an FPGA implementation of a polynomial multiplier for the NTRU cryptosystem
UL https://suche.suub.uni-bremen.de/peid=ieee-10336001&Exemplar=1&LAN=DE A1 Camacho-Ruiz, Eros A1 Sanchez-Solano, Santiago A1 Martinez-Rodriguez, Macarena C. A1 Tena-Sanchez, Erica A1 Brox, Piedad YR 2023 SN 2640-5563 K1 Computers K1 Performance evaluation K1 Gold K1 Power demand K1 Quantum computing K1 Power measurement K1 Side-channel attacks K1 Post-Quantum Cryptography K1 NTRU K1 Simple Power Analysis SP 1 OP 6 LK http://dx.doi.org/https://doi.org/10.1109/DCIS58620.2023.10336001 DO https://doi.org/10.1109/DCIS58620.2023.10336001 SF ELIB - SuUB Bremen
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