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Enhancing Transistor Sizing in Analog IC Design using a Cir..:
, In:
2023 IEEE 4th International Multidisciplinary Conference on Engineering Technology (IMCET)
,
Mina, Rayan
;
Sakr, George E.
;
Nassif, Houssam
- p. 223-228 , 2023
Link:
https://doi.org/10.1109/IMCET59736.2023.10368264
RT T1 <cTitle>2023 IEEE 4th International Multidisciplinary Conference on Engineering Technology (IMCET)</cTitle>: T1 <Title>Enhancing Transistor Sizing in Analog IC Design using a Circuit-Focused Semi-Supervised Learning</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10368264&Exemplar=1&LAN=DE A1 Mina, Rayan A1 Sakr, George E. A1 Nassif, Houssam YR 2023 K1 Measurement K1 Training K1 Supervised learning K1 Artificial neural networks K1 Machine learning K1 Semisupervised learning K1 Software K1 Transistor sizing K1 Analog IC design K1 Machine Learning K1 Artificial Neural Networks SP 223 OP 228 LK http://dx.doi.org/https://doi.org/10.1109/IMCET59736.2023.10368264 DO https://doi.org/10.1109/IMCET59736.2023.10368264 SF ELIB - SuUB Bremen
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