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1 Ergebnisse
1
A Reusable AI acceleration Architecture based on Matrix Mul..:
, In:
2023 IEEE 15th International Conference on ASIC (ASICON)
,
Chen, Bisheng
;
Li, Xiayu
;
Lu, Jicheng
. - p. 1-4 , 2023
Link:
https://doi.org/10.1109/ASICON58565.2023.10395957
RT T1 <cTitle>2023 IEEE 15th International Conference on ASIC (ASICON)</cTitle>: T1 <Title>A Reusable AI acceleration Architecture based on Matrix Multiplication for Convolutional Neural Network with Digital Signal ProcessingTasks</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10395957&Exemplar=1&LAN=DE A1 Chen, Bisheng A1 Li, Xiayu A1 Lu, Jicheng A1 Yu, Jun YR 2023 SN 2162-755X K1 Finite impulse response filters K1 Convolution K1 Signal processing algorithms K1 Computer architecture K1 Digital signal processing K1 Matrix decomposition K1 Artificial intelligence K1 AI Acceleration K1 Fast Fourier Transform (FFT) K1 Finite Impulse Response (FIR) K1 Reusable Architecture SP 1 OP 4 LK http://dx.doi.org/https://doi.org/10.1109/ASICON58565.2023.10395957 DO https://doi.org/10.1109/ASICON58565.2023.10395957 SF ELIB - SuUB Bremen
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